Resistance Drift Tuning in Ge₂Sb₂Te₅ Phase Change Memory Nanodevices via Cell Aspect Ratio and Pulse Engineering
Date:
I presented my poster on resistance drift tuning in Ge₂Sb₂Te₅ phase change memory nanodevices via cell aspect ratio and pulse engineering.
The poster was selected among the Top 15 posters in the Semiconductor category at the symposium.
Highlights
- Discussed methods to optimize GST-225 devices through structural and electrical pulse engineering.
